Drivers & Fanout Buffers | NB3L208K

2.5V，3.3V 差分，1:8 HCSL 扇出缓冲器

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NB3L208K 是一款差分 1:8 时钟扇出缓冲器，带高速电流转向 (HCSL) 输出。输入可直接接受差分 LVPECL、LVDS 和 HCSL 信号。使用恰当的外部 Vth 参考电源，接受单端 LVPECL、HCSL、LVCMOS 或 LVTTL 电平，参见图 4 和 6。 输入信号将转换为 HCSL，能够运行频率最高 350 MHz 的八个相同版本。NB3L208K 针对超低相位干扰、传播延迟变化和低输出-输出歪曲率进行了优化，符合 DB800H 标准。因此，系统设计人员可以利用 NB3L208K 的性能在背面电极或母板中分发低歪曲率时钟，因此适用于 PCI Express、FBDIMM、联网、移动计算、千兆位以太网等时钟和数据分发应用。输出驱动电流通过从 IREF（引脚 27）到 GND 联接一个 475 电阻来设置，如图 11 所示。输出端接时还可接口到 LVDS 接收器，如图 12 所示。

  • Mobile Computing
  • Networking
  • Gigabit Ethernet
  • FBDIMM
  • PCI Express Gen 3 and Gen 4

  • Maximum Input Clock Frequency > 350 MHz
  • 2.5 V ±5% / 3.3 V ±10% Supply Voltage Operation
  • 8 HCSL Outputs
  • DB800H Compliant
  • Individual OE Control Pin for Each Bank of 2 Outputs
  • 100 ps Max Output−to−Output Skew Performance
  • 1 ns Typical Propagation Delay
  • 450 ps Typical Rise and Fall Times
  • 80 fs Maximum Additive Phase Jitter RMS
  • PCIe Gen 3 and Gen 4 Compliant

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Reference Price

NB3L208KMNTXG

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CAD Model

Pb

A

H

P

QFN-32

488AM

1

260

REEL

1000

Y

Buffer

1

1:8

LVPECL

HCSL

3.3

0.046

20

1

700

350

-

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可靠性数据

Die Related Summary Data

Device: NB3L208KMNTXG

Equivalent to wafer fab process: ONC18

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

ONC18

2

6465777234

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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