Phase / Frequency Detectors | MC100EP40

相位频率检测器，3.3 V/ 5 V，ECL 差分

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MC100EP40 是一款三态相位频率检测器，用于在锁定时需要最低相位和频率差的相锁定环路应用。先进的设计显著减少了检测器的死区。为了正确操作，R 和 V 输入的输入边沿速率应小于 5 ns。该器件适合使用 3.3 V / 5 V 电源。 参考 (R) 和反馈 (FB) 输入的频率和/或相位不同时，差分 UP (U) 和 DOWN (D) 输出将提供脉冲流，如果减去和集成这些脉冲流则会提供用于控制 VCO 的误差电压。 参考 (R) 和反馈 (FB) 输入的相位差等于或小于 80 pS 时，相锁定检测引脚将通过高电平状态指示锁定。如图 2 所示，VTX（VTR、VTRbar、VTFB 和 VTFBbar）引脚为 50 线阻抗环境提供了一个内部终端网络。VTX 引脚需要 VCC-2 V 的外部汲电流。如果将两个差分 VTR 和 VTR（或 VTFB 和 VTFBbar）一起短路，则可提供与 LVDS 信号接收器终端兼容的 100 终端电阻。有关逻辑器件端接的更多信息，请参见 AND8020。 VBB 引脚作为内部产生的电源，仅可用于该器件。对于单端输入情况，将未使用的差分输入连接至 VBB，作为开关参考电压。VBB 还可重新偏置交流耦合输入。使用时，通过 0.01 F 电容器对 VBB 和 VCC 进行去耦合，并将源或汲电流限制为 0.5 mA。不使用时，VBB 应保持开路。 有关相锁定环路操作的更多信息，请参见 AND8040。在无信号条件下，应对差分输入进行特别考虑以防止不稳定。

  • Maximum Frequency > 2 Ghz Typical
  • Fully Differential
  • Advanced High Band Output Swing of 400 mV
  • Theoretical Gain = 1.11
  • Trise 97 pS Typical, Ffall 70 pS Typical
  • The 100 Series Contains Temperature Compensation
  • PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
  • NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V
  • 50Ω Internal Termination Resistor
  • These are Pb-Free Devices

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MC100EP40DTG

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CAD Model

Pb

A

H

P

TSSOP-20

9.48

1

260

TUBE

75

Y

ECL

ECL

5

0.93

2

2000

0.55

0.2

150

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MC100EP40DTR2G

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CAD Model

Pb

A

H

P

TSSOP-20

9.48

1

260

REEL

2500

Y

ECL

ECL

5

0.93

2

2000

0.55

0.2

150

Price N/A

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Die Related Summary Data

Device: MC100EP40DTG

Equivalent to wafer fab process: MOSAIC

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

MOSAIC

0

476668904

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Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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