AMD Zynq US+

用于AMD（Xilinx）Zynq US+ FPGA设计的非硬件验证电源树。

AMD Zynq US+ 电源树（Min Power）

请参考我们使用条款中"Design Tools, Software and Chat AI"一节的内容。

Product SKU

Descripton

500mA LDO, 0.6 to 5V Adjustable VOUT, with Enable / Power Good. WDFNW6_2x2mm

Synchronous buck regulator w/ Enable / Power Good. VIN from 2.9V to 5.5V up to 5A load. VOUT from 0.6V to 0.84 X VIN3x3mm QFN16

Synchronous buck regulator EN and PG. VIN from 2.3V to 5.5V, Vout from 0.3V to 2V, up to 3A load. 1.36x0.432mm WLCSP12

500mA LDO, 1.2V VOUT, with Enable / Power Good. WDFNW6_2x2mm

Synchronous buck regulator w/ Enable / Power Good. VIN from 2.9V to 5.5V up to 6 A load. VOUT from 0.6V to 0.84 X VIN3x3mm QFN16

Source/sink Double Data Rate (DDR1, 2, 3) 3A termination regulator

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请参考我们使用条款中"Design Tools, Software and Chat AI"一节的内容。

Product SKU

具体说明

500mA LDO, 0.6 to 5V Adjustable VOUT, with Enable / Power Good. WDFNW6_2x2mm

Synchronous buck regulator w/ Enable / Power Good. VIN from 2.9V to 5.5V up to 5A load. VOUT from 0.6V to 0.84 X VIN3x3mm QFN16

Synchronous buck regulator EN and PG. VIN from 2.3V to 5.5V, Vout from 0.3V to 2V, up to 3A load. 1.36x0.432mm WLCSP12

1A LDO, 1.2V VOUT, with Enable / Power Good WDFNW6_2x2mm

500mA LDO, 1.8V VOUT, with Enable / Power Good. WDFNW6_2x2mm

500mA LDO, 1.2V VOUT, with Enable / Output Discharge Circuit. XDFN_1x1mm

500mA LDO, 1.8V VOUT, with Enable / Output Discharge Circuit. XDFN_1x1mm

Synchronous buck regulator w/ Enable / Power Good. VIN from 2.9V to 5.5V up to 6A load. VOUT from 0.6V to 0.84 X VIN3x3mm QFN16

Source/sink Double Data Rate (DDR1, 2, 3) 3A termination regulator.