AMD Virtex US+

用于AMD（Xilinx）Virtex US+ FPGA设计的非硬件验证电源树

AMD Virtex US+ 电源树

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具体说明

Synchronous buck regulator Enable / Power Good. VIN from 3V to 18 V up to 40 A load. Stackable up to 4:160A. 5x7mm PQFN34

Synchronous buck regulator Enable / Power Good. VIN from 3V to 18V up to 25A load. Stackable up to 2:50A. 5x7mm PQFN34

Synchronous buck regulator Enable / Power Good. VIN from 4.5V to 18V up to 30A load. 5x6mm PQFN37

Synchronous buck regulator w/ Enable / Power Good. VIN from 2.9V to 5.5V up to 5A load. VOUT from 0.6V to 0.84 X VIN3x3mm QFN16.

Synchronous buck regulator Enable / Power Good, PMBUS 1.3.1 Compatible. VIN from 4.5V to 18V up to 15A load. 5x7mm QFN34

1A LDO, 1.2V VOUT, with Enable / Power Good WDFNW6_2x2mm

Synchronous buck regulator EN and PG. VIN from 2.9V to 5.5V up to 3A load. 3x3mm QFN16

Source/sink Double Data Rate (DDR1, 2, 3) 3A termination regulator.